View LT6402-6_1619975.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

1 64026fa LT6402-6 300mhz low distortion, low noise differential ampli er/ adc driver (a v = 6db) the lt ? 6402-6 is a low distortion, low noise differential ampli? er/adc driver for use in applications from dc to 300mhz. the LT6402-6 has been designed for ease of use, with minimal support circuitry required. exceptionally low input-referred noise and low distortion (with either single-ended or differential inputs) make the LT6402-6 an excellent solution for driving high speed 12-bit and 14-bit adcs. in addition to the normal un? ltered outputs (+out and Cout), the LT6402-6 has a built-in 75mhz differential low pass ? lter and an additional pair of ? ltered outputs (+outfiltered, Coutfiltered) to reduce external ? l- tering components when driving high speed adcs. the output common mode voltage is easily set via the v ocm pin, eliminating an output transformer or ac-coupling capacitors in many applications. the LT6402-6 is designed to meet the demanding require- ments of communications transceiver applications. it can be used as a differential adc driver, a general-purpose differential gain block, or in other applications requir- ing differential drive. the LT6402-6 can be used in data acquisition systems required to function at frequencies down to dc. the LT6402-6 operates on a 5v supply and consumes 30ma. it comes in a compact 16-lead 3mm 3mm qfn package and operates over a C40c to 85c temperature range. n differential adc driver for: imaging communications n differential driver/receiver n single ended to differential conversion n differential to single ended conversion n level shifting n if sampling receivers n saw filter interfacing/buffering n 300 mhz C3db bandwidth n fixed gain of 6db n low distortion: 49dbm oip3, C85dbc hd3 (20mhz, 2v p-p ) n low noise: 18.6db nf, e n = 3.8nv/ hz (20mhz) n differential inputs and outputs n additional filtered outputs n adjustable output common mode voltage n dc- or ac-coupled operation n minimal support circuitry required n small 0.75mm pro? le 16-lead 3mm 3mm qfn package distortion vs frequency, differential input, no r load typical application features applications description l , lt, ltc and ltm are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. 64026 ta01a if in LT6402-6 Cina Cinb v ocm v cc v ee 5v +inb +ina 10 10 lt c ? 2249 0.1 f 0.1 f 0.1 f 0.1 f +out Cout ain + ain C v cm frequency (mhz) 1 C100 distortion (dbc) C90 C80 C70 C60 C40 10 100 64026 ta01b C50 filtered outputs v out = 2v p-p hd3 hd2
LT6402-6 2 64026fa total supply voltage (v cca /v ccb /v ccc to v eea /v eeb /v eec ) ...................................................5.5v input current (+ina, ?ina, +inb, ?inb, v ocm , enable ) ................................................10ma output current (continuous) +out, ?out ...................................................100ma +outfiltered, ?outfiltered ......................30ma output short-circuit duration (note 2) ............ inde? nite operating temperature range (note 3).... ?40c to 85c speci? ed temperature range (note 4) .... ?40c to 85c storage temperature range ................... ?65c to 125c junction temperature ........................................... 125c (note 1) symbol parameter conditions min typ max units input/output characteristics (+ina, +inb, ?ina, ?inb, +out, ?out, +outfiltered, ?outfiltered) gdiff gain differential (+out, ?out), v in = 800mv differential l 5.8 6 6.3 db v swingmin single-ended +out, ?out, +outfiltered, ?outfiltered, v in = 2.2v differential l 0.25 0.35 0.5 v v v swingmax single-ended +out, ?out, +outfiltered, ?outfiltered, v in = 2.2v differential l 3.4 3.3 3.6 v v v swingdiff output voltage swing differential (+out, ?out), v in = 2.2v differential l 6.1 5.6 7v p-p v p-p i out output current drive l 30 35 ma v os input offset voltage l ?6.5 ?10 1 6.5 10 mv mv 16 15 14 13 5 6 7 8 top view ud package 16-lead (3mm 3mm) plastic qfn 9 10 17 11 12 4 3 2 1v ccc v ocm v cca v eea v eec enable v ccb v eeb +ina +inb ?ina ?inb +out +outfiltered ?outfiltered ?out t jmax = 125c, e ja = 68c/w, e jc = 4.2c/w exposed pad is v ee (pin 17) must be soldered to the pcb the l denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. v cca = v ccb = v ccc = 5v, v eea = v eeb = v eec = 0v, enable na nbnnanbn la nnan ableaan enan leaeen aeaneel aan aaeen eeaeane lb lb lb l n lb lb lb l n leabaen aeaneel aan aaeen eeaeane l l lb l n l l lb l n l elealaae
3 64026fa LT6402-6 the l denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. v cca = v ccb = v ccc = 5v, v eea = v eeb = v eec = 0v, enable = 0.8v, +ina shorted to +inb (+in), Cina shorted to Cinb (Cin), v ocm = 2.2v, input common mode voltage = 2.2v, no r load unless otherwise noted. symbol parameter conditions min typ max units tcv os input offset voltage drift t min to t max l 2.5 v/c i vrmin input voltage range, min single-ended l C0.1 v i vrmax input voltage range, max single-ended l 5.1 v r indiff input resistance l 170 200 240 c indiff input capacitance 1pf cmrr common mode rejection ratio input common mode C0.1v to 5.1v l 42 65 db r outdiff output resistance 0.3 c outdiff output capacitance 0.8 pf common mode voltage control (v ocm pin) gcm common mode gain differential (+out, Cout), v ocm = 1.2v to 3.6v differential (+out, Cout), v ocm = 1.4v to 3.4v l 0.9 0.9 1 1.1 1.1 v/v v/v v ocmmin output common mode voltage adjustment range, min l 1.2 1.4 v v v ocmmax output common mode voltage adjustment range, max single-ended l 3.6 3.4 v v v oscm output common mode offset voltage measured from v ocm to average of +out and Cout C30 4 30 mv i biascm v ocm input bias current l 515 a r incm v ocm input resistance l 0.8 3 m c incm v ocm input capacitance 1pf enable pin v il enable input low voltage l 0.8 v v ih enable input high voltage l 2v i il enable input low current enable = 0.8v l 0.5 a i ih enable input high current enable = 2v l 13 a power supply v s operating range l 4 5 5.5 v i s supply current enable = 0.8v l 24 30 37 ma i sdisabled supply current (disabled) enable = 2v l 250 500 a psrr power supply rejection ratio 4v to 5.5v l 55 90 db dc electrical characteristics
LT6402-6 4 64026fa symbol parameter conditions min typ max units input/output characteristics C3dbbw C3db bandwidth 100mv p-p differential (+out, Cout) 200 300 mhz 0.1dbbw bandwidth for 0.1db flatness 100mv p-p differential (+out, Cout) 30 mhz 0.5dbbw bandwidth for 0.5db flatness 100mv p-p differential (+out, Cout) 80 mhz sr slew rate 3.2v p-p differential (+out, Cout) 400 v/s t s1% 1% settling 1% settling for a 1v p-p differential step (+out, Cout) 10 ns t on turn-on time 200 ns t off turn-off time 1.8 s common mode voltage control (v ocm pin) C3dbbw cm common mode small-signal C3db bandwidth 0.1v p-p at v ocm , measured single-ended at +out and Cout 200 mhz sr cm common mode slew rate 1.3v to 3.4v step at v ocm 250 v/s noise/harmonic performance input/output characteristics 10mhz signal second/third harmonic distortion 2v p-p differential (+outfiltered, Coutfiltered) C86 dbc 2v p-p differential (+out, Cout) C84 dbc third-order imd 2v p-p differential composite (+outfiltered, Coutfiltered), f1 = 9.5mhz, f2 = 10.5mhz C101 dbc oip3 10m output third-order intercept differential (+outfiltered, Coutfiltered), f1 = 9.5mhz, f2 = 10.5mhz (note 5) 53 dbm nf noise figure measured using dc954a demo board 18.6 db e n10m input referred noise voltage density 3.8 nv/ hz 1db compression point r l = 100 (note 5) 20.7 dbm 20mhz signal second/third harmonic distortion 2v p-p differential (+outfiltered, Coutfiltered) C84 dbc 2v p-p differential (+out, Cout) C73 dbc third-order imd 2v p-p differential composite (+outfiltered, Coutfiltered), f1 = 19.5mhz, f2 = 20.5mhz C90 dbc 2v p-p differential composite (+out, Cout), r l = 400 , f1 = 19.5mhz, f2 = 20.5mhz C71 dbc oip3 20m output third-order intercept differential (+outfiltered, Coutfiltered), f1 = 19.5mhz, f2 = 20.5mhz 49 dbm nf noise figure measured using dc954a demo board (note 5) 18.6 db e n20m input referred noise voltage density 3.8 nv/ hz 1db compression point r l = 100 (note 5) 17.7 dbm t a = 25c, v cca = v ccb = v ccc = 5v, v eea = v eeb = v eec = 0v, ? e ? n ? a ? b ? l ? e = 0.8v, +ina shorted to +inb (+in), Cina shorted to Cinb (Cin), v ocm = 2.2v, input common mode voltage = 2.2v, no r load unless otherwise noted. ac electrical characteristics
5 64026fa LT6402-6 note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: as long as output current and junction temperature are kept below the absolute maximum ratings, no damage to the part will occur. note 3: the lt6402 is guaranteed functional over the operating temperature range of C40c to 85c. note 4: the lt6402c is guaranteed to meet speci? ed performance from 0c to 70c. it is designed, characterized and expected to meet speci? ed performance from C40c and 85c but is not tested or qa sampled at these temperatures. the lt6402i is guaranteed to meet speci? ed performance from C40c to 85c. note 5: since the LT6402-6 is a feedback ampli? er with low output impedance, a resistive load is not required when driving an adc. therefore, typical output power is very small. in order to compare the LT6402-6 with typical g m ampli? ers that require 50 output loading, the LT6402-6 output voltage swing driving an adc is converted to oip3 and p1db as if it were driving a 50 load. symbol parameter conditions min typ max units 25mhz signal second/third harmonic distortion 2v p-p differential (+outfiltered, Coutfiltered) C84 dbc 2v p-p differential (+out, Cout) C69 dbc third-order imd 2v p-p differential composite (+outfiltered, Coutfiltered), f1 = 24.5mhz, f2 = 25.5mhz C88 dbc 2v p-p differential composite (+out, Cout), r l = 400 , f1 = 24.5mhz, f2 = 25.5mhz C67 dbc oip3 25m output third-order intercept differential (+outfiltered, Coutfiltered), f1 = 24.5mhz, f2 = 25.5mhz (note 5) 47 dbm nf noise figure measured using dc954a demo board 12.6 db e n25m input referred noise voltage density 3.9 nv/ hz 1db compression point r l = 100 (note 5) 17.2 dbm t a = 25c, v cca = v ccb = v ccc = 5v,v eea = v eeb = v eec = 0v, ? e ? n ? a ? b ? l ? e = 0.8v, +ina shorted to +inb (+in), Cina shorted to Cinb (Cin), v ocm = 2.2v, input common mode voltage = 2.2v, no r load unless otherwise noted. frequency response, r load = 400 frequency response vs c load , r load = 400 frequency response, r load = 100 ac electrical characteristics typical performance characteristics frequency (mhz) 1 C5 gain (db) 5 15 10 100 1000 64026 g01 C15 C10 0 10 C20 C25 unfiltered v in = 100mv p-p unfiltered: r load = 400 filtered: r load = 300 (external) + 100 (internal, filtered outputs) filtered frequency (mhz) 1 0 gain (db) 5 10 15 20 10 100 1000 64026 g02 C5 C10 C15 C20 25 30 0pf 1.6pf 5pf 10pf frequency (mhz) 1 C3 gain (db) 0 3 6 9 10 100 1000 64026 g03 C6 C9 C12 C15 C18 C21 C24 C27 C30 12 15 unfiltered outputs filtered outputs v in = 100mv p-p unfiltered: r load = 100 filtered: r load = 100 (internal, filtered outputs)
LT6402-6 6 64026fa third order intermodulation distortion vs frequency, differential input, no r load output third order intercept vs frequency, differential input, r load = 400 distortion vs frequency, differential input, no r load distortion vs output amplitude, 20mhz differential input, no r load output 1db compression vs frequency typical performance characteristics third order intermodulation distortion vs frequency, differential input, r load = 400 output third order intercept vs frequency, differential input, no r load distortion vs frequency, differential input, no r load distortion vs output amplitude, 20mhz differential input, no r load frequency (mhz) 5 C105 third order imd (dbc) C95 C85 C75 C65 C45 10 15 20 25 64026 g04 30 35 C55 unfiltered outputs 2 tones 2v p-p composite 1mhz tone spacing filtered outputs frequency (mhz) 5 C100 third order imd (dbc) C90 C80 C70 C60 C40 10 15 20 25 64026 g05 30 35 C50 unfiltered outputs 2 tones 2v p-p composite 1mhz tone spacing filtered outputs frequency (mhz) 5 60 55 50 45 40 35 30 25 20 30 64026 g06 10 15 25 35 output ip3 (dbm) filtered outputs unfiltered outputs frequency (mhz) 5 27 output ip3 (db) 31 35 39 43 10 20 30 35 64026 g07 47 51 15 25 unfiltered outputs filtered outputs 2 tones 2v p-p composite 1mhz tone spacing frequency (mhz) 1 C100 distortion (dbc) C90 C80 C70 C60 C40 10 100 64026 g08 C50 filtered outputs v out = 2v p-p hd3 hd2 frequency (mhz) 1 C100 distortion (dbc) C90 C80 C70 C60 C40 10 100 64026 g09 C50 unfiltered outputs v out = 2v p-p hd3 hd2 output amplitude (dbm) C100 distortion (dbc) C90 C80 C70 C95 C85 C75 2468 64206 g10 10 1 03579 hd2 hd3 filtered outputs output amplitude (dbm) 0 distortion (dbc) C80 C75 8 64026 g11 C85 C90 2 4 5 10 C70 6 1 3 9 7 unfiltered outputs hd2 hd3 frequency (mhz) 1 0 output 1db compression (dbm) 10 25 20 10 100 1000 64026 g12 C10 C5 5 15 C15 C20 unfiltered outputs 400 load 100 load
7 64026fa LT6402-6 noise figure vs frequency input referred noise voltage vs frequency reverse isolation vs frequency differential input impedance vs frequency typical performance characteristics differential output impedance vs frequency input re? ection coef? cient vs frequency output re? ection coef? cient vs frequency psrr, cmrr vs frequency small-signal transient response frequency (mhz) 10 10 noise figure (db) 15 20 25 30 40 100 1000 64026 g13 35 measured using dc954 demo board frequency (mhz) 0 15 10 5 35 30 25 20 64206 g14 input referred noise voltage (nv/ hz) 10 1000 100 frequency (mhz) 1 C120 isolation (db) C40 C20 0 10 100 1000 64026 g15 C60 C80 C100 unfiltered outputs frequency (mhz) 1 C100 input impedance (magnitude , phase) 300 400 500 10 100 1000 64026 g16 200 100 0 impedance magnitude impedance phase frequency (mhz) 10 1 output impedance ( ) 10 100 100 1000 64206 g17 unfiltered outputs frequency (mhz) 1 C15 input reflection coefficient (s11) C10 C5 0 10 100 1000 64026 g18 C20 C25 C30 C35 measured using dc954 demo board frequency (mhz) 1 C20 output reflection coefficient (s22) C10 0 10 100 1000 64026 g19 C30 C25 C15 C5 C35 C40 measured using dc954 demo board frequency (mhz) 1 40 psrr, cmrr (db) 60 50 70 80 10 100 1000 64026 g20 20 10 30 0 120 110 100 90 unfiltered outputs psrr cmrr time (5ns/div) voltage (v) 2.220 2.240 2.260 64026 g21 2.180 2.120 2.280 2.200 2.160 2.140
LT6402-6 8 64026fa typical performance characteristics overdrive recovery time distortion vs output common mode voltage, LT6402-6 driving an ltc2249 14-bit adc turn-on time turn-off time 10mhz 8192 point fft, LT6402-6 driving an ltc2249 14-bit adc 20mhz 8192 point fft, LT6402-6 driving an ltc2249 14-bit adc 25mhz 8192 point fft, LT6402-6 driving an ltc2249 14-bit adc 20mhz 2-tone 32768 point fft, LT6402-6 driving an ltc2249 14-bit adc time (25ns/div) output voltage (v) 2.0 2.5 3.0 64026 g22 1.5 1.0 0 0.5 4.0 3.5 +out Cout r load = 100 per output output common mode voltage (v) 1.0 distortion (dbc) C65 1.6 64026 g23 C80 C90 1.2 1.4 1.8 hd2 C95 C100 C60 C70 C75 C85 2.0 2.2 2.4 filtered outputs no r load v out = 20mhz 2v p-p hd3 time (125ns/div) voltage (v) 2.0 3.0 64026 g24 1.0 0 4.0 1.5 2.5 0.5 3.5 +out r load = 100 per output Cout enable time (250ns/div) voltage (v) 2.0 3.0 64026 g25 1.0 0 +out Cout enable 1.5 2.5 0.5 3.5 4.0 r load = 100 per output frequency (mhz) 0 C140 amplitude (dbfs) C120 C100 C80 0 C40 4 8 10 18 C20 C60 C130 C110 C90 C10 C50 C30 C70 26 12 14 16 20 64026 g26 8192 point fft f in = 10mhz, C1dbfs filtered outputs frequency (mhz) 0 C140 amplitude (dbfs) C120 C100 C80 0 C40 4 8 10 18 C20 C60 C130 C110 C90 C10 C50 C30 C70 26 12 14 16 20 64026 g27 8192 point fft f in = 20mhz, C1dbfs filtered outputs frequency (mhz) 0 C140 amplitude (dbfs) C120 C100 C80 0 C40 4 8 10 18 C20 C60 C130 C110 C90 C10 C50 C30 C70 26 12 14 16 20 64026 g28 8192 point fft f in = 25mhz, C1dbfs filtered outputs frequency (mhz) 0 C140 amplitude (dbfs) C120 C100 C80 0 C40 510 20 C20 C60 C130 C110 C90 C10 C50 C30 C70 2.5 7.5 12.5 15 17.5 22.5 64026 g29 32768 point fft tone 1 at 19.5mhz, C7dbfs tone 2 at 20.5mhz, C7dbfs filtered outputs
9 64026fa LT6402-6 v ocm (pin 2): this pin sets the output common mode voltage. without additional biasing, both inputs bias to this voltage as well. this input is high impedance. v cca , v ccb , v ccc (pins 3, 10, 1): positive power supply (normally tied to 5v). all three pins must be tied to the same voltage. bypass each pin with 1000pf and 0.1f capacitors as close to the package as possible. split supplies are possible as long as the voltage between v cc and v ee is 5v. v eea , v eeb , v eec (pins 4, 9, 12): negative power supply (normally tied to ground). all three pins must be tied to the same voltage. split supplies are possible as long as the voltage between v cc and v ee is 5v. if these pins are not tied to ground, bypass each pin with 1000pf and 0.1f capacitors as close to the package as possible. +out, Cout (pins 5, 8): outputs (un? ltered). these pins are high bandwidth, low-impedance outputs. the dc output voltage at these pins is set to the voltage applied at v ocm . +outfiltered, Coutfiltered (pins 6, 7): filtered outputs. these pins add a series 50 resistor from the un? ltered outputs and three 14pf capacitors. each output has 14pf to v ee , plus an additional 14pf between each pin (see the block diagram). this ? lter has a C3db bandwidth of 75mhz. enable (pin 11): this pin is a ttl logic input referenced to the v eec pin. if low, the LT6402-6 is enabled and draws typically 30ma of supply current. if high, the LT6402-6 is disabled and draws typically 250a. +ina, +inb (pins 15, 16): positive inputs. these pins are normally tied together. these inputs may be dc- or ac- coupled. if the inputs are ac-coupled, they will self-bias to the voltage applied to the v ocm pin. Cina, Cinb (pins 14, 13): negative inputs. these pins are normally tied together. these inputs may be dc- or ac- coupled. if the inputs are ac-coupled, they will self-bias to the voltage applied to the v ocm pin. exposed pad (pin 17): tie the pad to v eec (pin 12). if split supplies are used, do not tie the pad to ground. pin functions
LT6402-6 10 64026fa circuit description the LT6402-6 is a low noise, low distortion differential ampli? er/adc driver with: ? C3db bandwidth dc to 300mhz ? fixed gain independent of r load 2v/v (6db) ? differential input impedance 200 ? low output impedance ? built-in, user adjustable output ? ltering ? requires minimal support circuitry referring to the block diagram, the LT6402-6 uses a closed-loop topology which incorporates 3 internal am- pli? ers. two of the ampli? ers (a and b) are identical and drive the differential outputs. the third ampli? er is used to set the output common mode voltage. gain and input impedance are set by the 200 resistors in the internal feedback network. output impedance is low, determined by the inherent output impedance of ampli? ers a and b, and further reduced by internal feedback. the LT6402-6 also includes built-in single-pole output ? ltering. the user has the choice of using the un? ltered outputs, the ? ltered outputs (75mhz C3db lowpass), or modifying the ? ltered outputs to alter frequency response by adding additional components. many lowpass and bandpass ? lters are easily implemented with just one or two additional components. block diagram + C 14 Cina 5 +out 64026 bd 3 v cca 10 v ccb 1 v ccc 11 enable 13 Cinb 14pf v cca a v eea v eea 50 6 +outfiltered C + 16 +ina 8 Cout 15 +inb v ccb b v eeb v eeb 200 200 200 200 200 200 200 200 50 14pf 14pf 7 Coutfiltered 12 v eec 9 v eeb 4 v eea + C v eec c v ccc 2 v ocm bias applications information
11 64026fa LT6402-6 the LT6402-6 has been designed to minimize the need for external support components such as transformers or ac-coupling capacitors. as an adc driver, the LT6402-6 requires no external components except for power-supply bypass capacitors. this allows dc-coupled operation for applications that have frequency ranges including dc. at the outputs, the common mode voltage is set via the v ocm pin, allowing the LT6402-6 to drive adcs directly. no output ac-coupling capacitors or transformers are needed. at the inputs, signals can be differential or single-ended with virtually no difference in performance. furthermore, dc levels at the inputs can be set independently of the output common mode voltage. these input characteristics often eliminate the need for an input transformer and/or ac-coupling capacitors. input impedance and matching networks calculation of the input impedance of the LT6402-6 is not straightforward from examination of the block diagram because of the internal feedback network. in addition, the input impedance when driven differentially is different than when driven single-ended. differential single-ended LT6402-6 200 133 for single-ended 50 applications, an 80.6 shunt matching resistor to ground will result in the proper input termination (figure 1). for differential inputs there are several termination options. if the input source is 50 differential, then the input matching can be accomplished by either a 67 shunt resistor across the inputs (figure 3), or equivalent 33 shunt resistors on each of the inputs to ground (figure 2). figure 1. input termination for single-ended 50 input impedance single-ended to differential operation the LT6402-6s performance with single-ended inputs is comparable to its performance with differential inputs. this excellent single-ended performance is largely due to the internal topology of the LT6402-6. referring to the block diagram, if the +ina and +inb pins are driven with a single-ended signal (while Cina and Cinb are tied to ac ground), then the +out and Cout pins are driven differentially without any voltage swing needed from ampli? er c. single-ended to differential conversion using more conventional topologies suffers from performance limitations due to the common mode ampli? er. driving adcs the LT6402-6 has been speci? cally designed to interface directly with high speed analog to digital converters (adcs). in general, these adcs have differential inputs, with an input impedance of 1k or higher. in addition, there is generally some form of lowpass or bandpass ? ltering just prior to the adc to limit input noise at the adc, thereby improving system signal to noise ratio. both the un? ltered and ? ltered outputs of the LT6402-6 can easily drive the figure 3. alternate input termination for differential 50 input impedance figure 2. input termination for differential 50 input impedance applications information 64026 f01 if in 0.1 f LT6402-6 Cina Cinb Cout +out 8 5 +inb +ina 14 13 15 80.6 z in = 50 single-ended 16 64026 f02 if in C if in + LT6402-6 Cina Cinb Cout +out 8 5 +inb +ina 14 13 15 33 z in = 50 differential 16 33 64026 f03 if in C if in + LT6402-6 Cina Cinb Cout +out 8 5 +inb +ina 14 13 15 z in = 50 differential 16 67
LT6402-6 12 64026fa figure 5. LT6402-6 internal filter topology C3db bw 75mhz figure 6. LT6402-6 internal filter topology modi? ed for 2x filter bandwidth (2 external resistors) high impedance inputs of these differential adcs. if the ? ltered outputs are used, then cutoff frequency and the type of ? lter can be tailored for the speci? c application if needed. wideband applications (using the +out and Cout pins) in applications where the full bandwidth of the LT6402-6 is desired, the un? ltered output pins (+out and Cout) should be used. they have a low output impedance; therefore, gain is unaffected by output load. capacitance in excess of 5pf placed directly on the un? ltered outputs results in additional peaking and reduced performance. when driving an adc directly, a small series resistance is recommended between the LT6402-6s outputs and the adc inputs (figure 4). this resistance helps eliminate any resonances associated with bond wire inductances of either the adc inputs or the LT6402-6s outputs. a value between 10 and 25 gives excellent results. resistor/capacitor combination creates ? ltered outputs that look like a series 50 resistor with a 42pf capacitor shunting each ? ltered output to ac ground, giving a C3db bandwidth of 75mhz. the ? lter cutoff frequency is easily modi? ed with just a few external components. to increase the cutoff frequency, simply add 2 equal value resistors, one between +out and +outfiltered and the other between Cout and Coutfil- tered (figure 6). these resistors are in parallel with the internal 50 resistor, lowering the overall resistance and increasing ? lter bandwidth. to double the ? lter bandwidth, for example, add two external 50 resistors to lower the series resistance to 25 . the 42pf of capacitance remains unchanged, so ? lter bandwidth doubles. to decrease ? lter bandwidth, add two external capacitors, one from +outfiltered to ground, and the other from Coutfiltered to ground. a single differential capacitor connected between +outfiltered and Coutfiltered figure 4. adding small series r at LT6402-6 output filtered applications (using the +outfiltered and Coutfiltered pins) f iltering at the output of the LT6402-6 is often desired to provide either anti-aliasing or improved signal to noise ratio. to simplify this ? ltering, the LT6402-6 includes an additional pair of differential outputs (+outfiltered and Coutfiltered) which incorporate an internal lowpass ? lter network with a C3db bandwidth of 75mhz (figure 5). these pins each have an output impedance of 50 . internal capacitances are 14pf to v ee on each ? ltered output, plus an additional 14pf capacitor con- nected differentially between the two ? ltered outputs. this applications information 64026 f04 LT6402-6 Cout +out 8 5 10 to 25 10 to 25 adc 64026 f05 50 v ee v ee 14pf LT6402-6 Cout +out 50 14pf 14pf Coutfiltered +outfiltered 8 7 6 5 filtered output (75mhz) v ee v ee 64026 f06 50 50 14pf LT6402-6 Cout +out 50 50 14pf 14pf Coutfiltered filtered output (150mhz) +outfiltered 8 7 6 5
13 64026fa LT6402-6 can also be used, but since it is being driven differentially it will appear at each ? ltered output as a single-ended capacitance of twice the value. to halve the ? lter band- width, for example, two 42pf capacitors could be added (one from each ? ltered output to ground). alternatively one 21pf capacitor could be added between the ? ltered outputs, again halving the ? lter bandwidth. combinations of capacitors could be used as well; a three capacitor solution of 14pf from each ? ltered output to ground plus a 14pf capacitor between the ? ltered outputs would also halve the ? lter bandwidth (figure 7). bandpass ? ltering is also easily implemented with just a few external components. an additional 560pf and 62nh, each added differentially between +outfiltered and Coutfiltered creates a bandpass ? lter with a 26mhz center frequency, C3db points of 23mhz and 30mhz, and 1.6db of insertion loss (figure 8). output common mode adjustment the LT6402-6s output common mode voltage is set by the v ocm pin. it is a high-impedance input, capable of setting the output common mode voltage anywhere in a range from 1.1v to 3.6v. bandwidth of the v ocm pin is typically 200mhz, so for applications where the v ocm pin is tied to a dc bias voltage, a 0.1f capacitor at this pin is recom- mended. for best distortion performance, the voltage at the v ocm pin should be between 1.2v and 2.6v. when interfacing with most adcs, there is generally a v ocm output pin that is at about half of the supply voltage of the adc. for 5v adcs such as the ltc17xx family, this v ocm output pin should be connected directly (with the addition of a 0.1f capacitor) to the input v ocm pin of the LT6402-6. for 3v adcs such as the ltc22xx families, the LT6402-6 will function properly using the 1.65v from the adcs v cm reference pin, but improved spurious free dynamic range (sfdr) and distortion performance can be achieved by level-shifting the ltc22xxs v cm reference voltage up to at least 1.8v. this can be accomplished as shown in figure 9 by using a resistor divider between the ltc22xxs v cm output pin and v cc and then bypassing the LT6402-6s v ocm pin with a 0.1f capacitor. for a com- mon mode voltage above 1.9v, ac coupling capacitors are recommended between the LT6402-6 and ltc22xx adcs because of the input voltage range constraints of the adc. figure 7. LT6402-6 internal filter topology modi? ed for 1/2x filter bandwidth (3 external capacitors) figure 8. LT6402-6 output filter modi? ed for bandpass filtering (1 external inductor, 1 external capacitor) figure 9. level shifting 3v adc v cm voltage for improved sfdr applications information v ee v ee 64026 f07 50 14pf LT6402-6 Cout +out 50 14pf 14pf 14pf 14pf 14pf Coutfiltered +outfiltered 8 7 6 5 filtered output (37.5mhz) v ee v ee 64026 f08 50 14pf LT6402-6 Cout +out 50 14pf 14pf Coutfiltered +outfiltered 8 7 6 5 filtered output 64026 f09 if in LT6402-6 Cina Cinb v ocm 2 31 6 7 1 2 +inb +ina 14 13 15 80.6 16 10 10 ltc22xx 0.1 f 0.1 f +outfiltered Coutfiltered ain + ain C 4.02k 11k 1.9v 1.5v 3v v cm
LT6402-6 14 64026fa large output voltage swings the LT6402-6 has been designed to provide the 3.2v p-p output swing needed by the ltc1748 family of 14-bit low-noise adcs. this additional output swing improves system snr by up to 4db. input bias voltage and bias current the input pins of the LT6402-6 are internally biased to the voltage applied to the v ocm pin. no external biasing resistors are needed, even for ac-coupled operation. the input bias current is determined by the voltage difference between the input common mode voltage and the v ocm pin (which sets the output common mode voltage). for example, if the inputs are tied to 2.5v with the v ocm pin at 2.2v, then a total input bias current of 1.5ma will ? ow into the LT6402-6s +ina and +inb pins. furthermore, an additional input bias current totaling 1.5ma will ? ow into the Cina and Cinb inputs. application (demo) boards the dc954a demo board has been created for stand-alone evaluation of the LT6402-6 with either single-ended or differential input and output signals. as shown, it accepts a single-ended input and produces a single-ended output so that the LT6402-6 can be evaluated using standard laboratory test equipment. for more information on this demo board, please refer to the layout and schematic diagrams found later in this data sheet. there are also additional demo boards available that combine the LT6402-6 with a variety of different linear technology adcs. please contact the factory for more information on these demo boards. top silkscreen applications information typical application
15 64026fa LT6402-6 information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. ud package 16-lead plastic qfn (3mm 3mm) (reference ltc dwg # 05-08-1691) 3.00 0.10 (4 sides) recommended solder pad pitch and dimensions 1.45 0.05 (4 sides) note: 1. drawing conforms to jedec package outline mo-220 variation (weed-2) 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package pin 1 top mark (note 6) 0.40 0.10 bottom view?xposed pad 1.45 0.10 (4-sides) 0.75 0.05 r = 0.115 typ 0.25 0.05 1 pin 1 notch r = 0.20 typ or 0.25 45 chamfer 15 16 2 0.50 bsc 0.200 ref 2.10 0.05 3.50 0.05 0.70 0.05 0.00 ?0.05 (ud16) qfn 0904 0.25 0.05 0.50 bsc package outline package description
LT6402-6 16 64026fa ? linear technology corporation 2006 lt 1007 rev a ? printed in usa linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com part number description comments lt1993-2 800mhz differential amplifier/adc driver a v = 2v/v, nf = 12.3db, oip3 = 38dbm at 70mhz lt1993-4 900mhz differential ampli? er/adc driver a v = 4v/v, nf = 14.5db, oip3 = 40dbm at 70mhz lt1993-10 700mhz differential ampli? er/adc driver a v = 10v/v, nf = 12.7db, oip3 = 40dbm at 70mhz lt5514 ultralow distortion if ampli? er/adc driver digitally controlled gain output ip3 47dbm at 100mhz lt6402-12 300mhz differential ampli? er/adc driver a v = 12db, e n = 2.6nv/ hz at 20mhz, 150mw lt6402-20 300mhz differential ampli? er/adc driver a v = 20db, e n = 1.9nv/ hz at 20mhz, 150mw lt6411 650mhz differential adc driver/dual selectable gain ampli? er 3300v/s slew rate, 16ma current consumption, selectable gai n: a v = C1, +1, +2 lt6600-5 very low noise differential ampli? er and 5mhz lowpass filter 82db s/n with 3v supply, so-8 package lt6600-10 very low noise differential ampli? er and 10mhz lowpass filter 82db s/n with 3v supply, so-8 package lt6600-20 very low noise differential ampli? er and 20mhz lowpass filter 76db s/n with 3v supply, so-8 package demo circuit dc954a schematic (ac test circuit) related parts typical application ? ? c20, 0.1 f ? ? v cc c14 4.7 f c15 1 f ? ? j6 test in j7 test out j3 v ocm ? ? 3 1 2 4 1 5 v cc v cc c10 0.01 f c9 1000pf 64026 ta02 13 14 15 16 11 10 9 12 v cc v cc gnd sw1 23 4 1 8 7 6 5 r8 [1] r10 24.9 r6 0 r18 0 r5 0 r7 [1] r9 24.9 r12 75 r16 0 r15 [1] 0db r11 75 0db c18 0.01 f notes: unless otherwise specified, [1] do not stuff. c4 0.1 f c3 0.1 f c2 0.1 f c1 0.1 f t1 1:1 z-ratio m/a-com etc1-1t mini- circuits tcm 4-19 mini- circuits tcm 4-19 t2 4:1 z-ratio c17 1000pf c13 0.01 f c12 1000pf r22 [1] r21 [1] c7 0.01 f Cina Cinb +inb +ina v eec v ccb v eeb v ocm v cca v ccc v eea Coutfiltered Cout +outfiltered +out enable tp1 enable r14 0 j4 Cout j5 +out r13 [1] 5 4 2 2 13 3 r4 33 r3 33 r2 0 j1 Cin j2 +in r1 [1] 0db r20 11k r19 14k r17 0 v cc v cc tp2 v cc c5 0.1 f c6 0.1 f t4 4:1 5 4 3 1 2 tp3 gnd LT6402-6 1 2 1 2 1 2 1 2 1 2 1 c21 0.1 f 2 1 1 t3 1:4 5 4 2 3 c19, 0.1 f 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 c8 [1] l1 [1] 2 1 c11 [1] 1 2 2 1 1 1 c22 0.1 f 2 1 c16 [1] 1 2 2 1 2 1 4.8db C6db mini- circuits tcm 4-19

▲Up To Search▲

Price & Availability of LT6402-6

	To Download LT6402-6 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .